SysML Users in Thailand

It has been a while since I posted my previous article on this blog, because I was busy in making MagicDraw SysML supports for the new OMG SysML v1.3 Specification [1]. Couple weeks ago, I was asked by a customer about how to model a clock which counts every second with SysML. I created the simple clock model for answering. I also posted it to the SysMLForum and found that some people are interested in my clock model. So, I wrote this article to explain about the clock model and show how to model the system operating by a time trigger. Start from defining the clock with a SysML block. The clock block contains only a value property t . This value property represents time in second. Thus, a value type Second must be defined for typing the value property as in Figure 1. Figure 1 - SysML Block Definition Diagram of Clock Model Next, SysML State Machine will be created to describe the behavior of the clock block. Here, the clock state-machine was designed to have only one state

Today (Feb 23, 2012), I was asked by a customer about the way to add SI prefixes to a unit. My customer knows that it is possible to create a new unit, but he or she does not know how to include the information that the new unit is related to the references unit with some multiplier. I wondered that I have not seen the information about using the QUDV library in any of my SysML books. It seem to be a missing part of them. So, I decided to write this article by hoping that it will help other SysML users to gain more understanding about such library. The SysML v1.2 Specification [1] has provided the information about quantities, units, dimension and value types in Annex C.5. However, the specification does not provide any examples about using the prefixed unit and other conversion based unit sub-types. This article will show the way to create a prefixed unit which has information about its reference unit and the multiplier. Figure 1 -- QUDV model of Units and QuantityKinds A

This article was written when SysML v1.3 specification is in releasing process. If you are a big fan of SysML and keep in touch with SysML RTF, you may have seen some documents or books about SysML v1.3 such as [1] and [2]. One of many things that I am impressed in those books and documents, is the way they use SysML to describe nested ports and specify compatibility between connected ports using association blocks.  When two ports connected by a connector, they may have nested ports which themselves can be connected. An association block has been suggested for defining the internal structure of the connector. It could contain a set of connectors that define the connectors between nested ports of association ends. When a connector is typed by an association block, the interaction between roles at both ends of connector will be handled by the internal structure of the association block [1].  This approach give us not only the ability to decompose ports and connectors but also the a

SysML parametrics is based in part on a theory called composable objects (COBs). Composable objects have been developed at the Georgia Institute of Technology (GIT) as a means for representing and integrating design models with diverse analysis  models. [1] Design and analysis information is typically represented by a collection of interrelated models of varying discipline and fidelity. Thus a method for capturing diverse multi-fidelity models and  their fine-grained relations was needed. It was also desirable for this method to be independent of the specific  CAD/CAE tools used to create, manage, and compute these models. If you are OmniGraffle user:  please visit my COB stencil library at  http://graffletopia.com/stencils/848 Ref: [1] Russell S. Peak 1, Roger M. Burkhart 2 , Sanford A. Friedenthal 3 , Miyako W. Wilson 1 , Manas Bajaj 1 , Injoong Kim 1 , Simulation-Based Design Using SysML  Part 1: A Parametrics Primer

I have been asked many times by customers, that why they cannot use a connector to connect between ports on the boundaries of blocks in SysML Block Definition Diagram (BDD). Is that a tool's problem? After I have answered this question many times, I think it would be helpful for SysML users if there is an article to answer such question. For easy to explain, please see Figure 1. My customers try to use a connector to connect port p1  of SubSystem1 to the port p2  of SubSystem2  but they cannot. So, they have asked me with above question. Figure 1 -- SysML Block Definition Diagram To answer it, we should start by asking ourselves that does it make sense if a connector can connect both ports together? What should be the meaning of that connection? especially when we have multiple instances of SubSystem1 and SubSystem2 . Should the ports p1 of all  SubSystem1  instances be connected to the ports p2 of all  SubSystem2  instances?  I don't think so. BDD is used to